Anil Godbole of Intel and the CXL Consortium will discuss the cloud deployments, DDR4 reuse strategies, and memory pooling advances shaping CXL’s next phase at Endless Memory with CXL: Episode 1.
Register for Endless Memory with CXL: Episode 1
AI infrastructure needs more memory capacity, more bandwidth, and better ways to share data. At the same time, rising memory costs are pushing cloud providers and enterprises to get more value from the memory they already own.
That combination makes this a timely moment for Compute Express Link (CXL). In his session, “CXL: From Standard to Industry Transformation,” Anil Godbole traces CXL’s progress from its first specification in 2019 to deployments by major cloud operators. He also explains why memory pooling could become one of CXL’s most consequential uses for AI.
About the speaker and Intel’s role in CXL
Anil Godbole is Intel’s Xeon CXL Strategy and Marketing Manager and Chair of the CXL Consortium’s Marketing Work Group. Intel created the original CXL technology and developed the initial specification, then helped launch the CXL Consortium in 2019 so the industry could develop it as an open standard. Intel has continued to advance CXL through its work in the consortium and support in Xeon processors. Godbole brings that perspective to his discussion of CXL memory expansion, DDR4 reuse, and pooling for AI workloads.
The standard is advancing as demand grows
Released in November 2025, CXL 4.0 doubles the data rate to 128 GT/s. It also introduces bundled ports, which allow compatible hosts and devices to combine connections for more bandwidth.
Godbole is candid about the adoption curve: direct attach CXL memory has developed more slowly than initially anticipated. But the conditions are changing. Server CPUs with broader CXL support are reaching the market, cloud providers are describing production uses, and memory prices are giving buyers a stronger reason to examine expansion and reuse.
Cloud deployments show what CXL can do today
One example in the presentation is Microsoft Azure’s use of CXL memory for M-series virtual machines. Godbole explains Intel’s Flat Memory Mode, which presents local DRAM and CXL attached memory as a combined memory space. Hardware manages data at cache line granularity, avoiding some of the CPU work and page migration involved in software controlled tiering.
He also walks through a SAP HANA example using reused DDR4 RDIMMs. The analysis he presents estimates more than 40% total cost of ownership savings with an approximately 4% performance reduction for that configuration. Those figures describe a particular workload and cost model, but they show why DDR4 reuse has attracted attention.
Godbole points to another approach discussed by Google and Meta: placing reused DDR4 behind CXL as a memory tier for less active data. Meta has described a server configuration in which CXL attached, reused DDR4 supplies a portion of system memory. For organizations upgrading servers that cannot directly accommodate their existing DDR4 DIMMs, that is a compelling question to investigate: how much useful life can CXL give installed memory?
Register for Endless Memory with CXL: Episode 1
Microsoft Azure’s use of CXL memory for M-series virtual machines
Local DRAM is the server’s built-in, faster memory. CXL adds another tier of memory, giving the server more capacity while keeping frequently used data close to the processor.
Memory pooling is the next wave
Memory expansion adds capacity to a server. Memory pooling changes how capacity is allocated across servers. Instead of equipping every machine for its peak requirement, operators can draw additional capacity from a shared pool when workloads need it.
Godbole identifies a second benefit: systems working on the same data can potentially share it by reference, reducing the need to copy or shuffle it across a network. That matters for distributed databases, analytics, and AI applications.
One emerging example is the KV cache used during AI inference. As agentic workloads grow, keeping useful cache data close to processors and making it available across collaborating systems could improve efficiency. Godbole discusses industry demonstrations and argues that shared CXL memory deserves attention as an alternative to moving cache data between hosts through storage and networks.
The opportunity is significant, but Godbole also names the remaining work: the ecosystem needs more seamless software and infrastructure to make memory pooling straightforward to deploy.
CXL’s story is moving beyond what the specification permits to what operators can deploy and measure. Join Anil Godbole at Endless Memory with CXL: Episode 1 on September 30 to hear his assessment of current adoption, DDR4 reuse, and the role memory pooling could play in AI infrastructure.
Register for Endless Memory with CXL: Episode 1
